swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 1 | #include "cpu.h" |
swissChili | b71e027 | 2020-08-08 15:56:14 -0700 | [diff] [blame] | 2 | #include "common.h" |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 3 | #include "instructions.h" |
swissChili | 94ba1f5 | 2020-08-08 11:39:10 -0700 | [diff] [blame] | 4 | #define SCREEN_ONLY_SDL |
| 5 | #include "screen.h" |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 6 | |
swissChili | c6b4f7e | 2020-08-09 16:36:36 -0700 | [diff] [blame^] | 7 | #include "dbg.h" |
| 8 | #include <errno.h> |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 9 | #include <endian.h> |
| 10 | #include <stdio.h> |
| 11 | #include <stdlib.h> |
| 12 | #include <string.h> |
| 13 | |
| 14 | #define die(m, ...) \ |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 15 | printf("\033[31m" m "\033[0m\n", ##__VA_ARGS__); \ |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 16 | exit(1); |
| 17 | |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 18 | #define warn(m, ...) \ |
| 19 | printf("\033[33m" m "\033[0m\n", ##__VA_ARGS__); |
| 20 | |
swissChili | 94ba1f5 | 2020-08-08 11:39:10 -0700 | [diff] [blame] | 21 | |
| 22 | sdl_screen_t *g_scr = NULL; |
| 23 | |
| 24 | |
swissChili | dbbd540 | 2020-08-07 15:07:39 -0700 | [diff] [blame] | 25 | void reset(cpu_t *cpu) |
| 26 | { |
swissChili | b04a402 | 2020-08-09 12:51:00 -0700 | [diff] [blame] | 27 | cpu->regs[SP] = 0xFF; // stack at is 0x100 + SP |
swissChili | bb478f1 | 2020-08-07 20:45:07 -0700 | [diff] [blame] | 28 | cpu->pc = 0x600; // arbitrary program counter start |
swissChili | dbbd540 | 2020-08-07 15:07:39 -0700 | [diff] [blame] | 29 | cpu->running = true; |
swissChili | e7ee6da | 2020-08-08 16:14:21 -0700 | [diff] [blame] | 30 | memset(cpu->mem + 0x100, 0, 0xFE); |
swissChili | dbbd540 | 2020-08-07 15:07:39 -0700 | [diff] [blame] | 31 | } |
| 32 | |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 33 | cpu_t new_cpu() |
| 34 | { |
| 35 | cpu_t cpu = { 0 }; |
swissChili | b04a402 | 2020-08-09 12:51:00 -0700 | [diff] [blame] | 36 | cpu.regs[SP] = 0xFF; // stack at is 0x100 + SP |
swissChili | bb478f1 | 2020-08-07 20:45:07 -0700 | [diff] [blame] | 37 | cpu.pc = 0x600; // arbitrary program counter start |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 38 | cpu.running = true; |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 39 | cpu.mem = malloc(0xFFFF); |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 40 | cpu.screen_dirty = true; |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 41 | memset(cpu.mem, 0, 0xFFFF); |
| 42 | |
swissChili | b71e027 | 2020-08-08 15:56:14 -0700 | [diff] [blame] | 43 | ASSERT("Allocate memory for CPU", cpu.mem); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 44 | |
| 45 | return cpu; |
| 46 | } |
| 47 | |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 48 | uint16_t le_to_native(uint8_t a, uint8_t b) |
| 49 | { |
| 50 | #ifdef LITTLE_ENDIAN |
| 51 | return b << 8 | a; |
| 52 | #else |
| 53 | return a << 8 | b; |
| 54 | #endif |
| 55 | } |
| 56 | |
| 57 | void native_to_le(uint16_t n, uint8_t *a, uint8_t *b) |
| 58 | { |
| 59 | #ifdef LITTLE_ENDIAN |
| 60 | *a = n >> 8; |
| 61 | *b = n & 0xFF; |
| 62 | #else |
| 63 | *a = n & 0xFF; |
| 64 | *b = n >> 8; |
| 65 | #endif |
| 66 | } |
| 67 | |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 68 | void stack_push(cpu_t *cpu, uint8_t v) |
| 69 | { |
| 70 | cpu->mem[cpu->regs[SP]-- + 0x100] = v; |
| 71 | } |
| 72 | |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 73 | void stack_pushle(cpu_t *cpu, uint16_t v) |
| 74 | { |
| 75 | uint8_t a, b; |
| 76 | native_to_le(v, &a, &b); |
| 77 | // push in "reverse" order so that the address is stored as LE |
| 78 | stack_push(cpu, b); |
| 79 | stack_push(cpu, a); |
| 80 | } |
| 81 | |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 82 | uint8_t stack_pop(cpu_t *cpu) |
| 83 | { |
| 84 | return cpu->mem[cpu->regs[SP]++ + 0x100]; |
| 85 | } |
| 86 | |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 87 | uint16_t stack_pople(cpu_t *cpu) |
| 88 | { |
| 89 | uint8_t a = stack_pop(cpu); |
| 90 | uint8_t b = stack_pop(cpu); |
| 91 | return le_to_native(a, b); |
| 92 | } |
| 93 | |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 94 | void free_cpu(cpu_t *cpu) |
| 95 | { |
| 96 | free(cpu->mem); |
| 97 | } |
| 98 | |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 99 | // rotate right |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 100 | uint8_t ror(uint8_t a, uint8_t n) |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 101 | { |
| 102 | return (a >> n) | (a << (8 - n)); |
| 103 | } |
| 104 | |
| 105 | // rotate left |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 106 | uint8_t rol(uint8_t a, uint8_t n) |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 107 | { |
| 108 | return (a << n) | (a >> (8 - n)); |
| 109 | } |
| 110 | |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 111 | void stat_nz(cpu_t *cpu, int8_t v) |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 112 | { |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 113 | cpu->status.negative = v < 0; |
| 114 | cpu->status.zero = v == 0; |
| 115 | } |
| 116 | |
| 117 | // Used to check for overflow, is c unique? |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 118 | bool last_unique(bool a, bool b, bool c) |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 119 | { |
| 120 | return a == b && a != c; |
| 121 | } |
| 122 | |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 123 | void stat_cv(cpu_t *cpu, uint8_t a, uint8_t b, uint8_t c) |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 124 | { |
| 125 | cpu->status.overflow = last_unique(a >> 7, b >> 7, c >> 7); |
| 126 | cpu->status.carry = c < a || c < b; |
| 127 | } |
| 128 | |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 129 | void cmp(cpu_t *cpu, uint8_t reg, uint8_t mem) |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 130 | { |
| 131 | cpu->status.negative = 0; |
| 132 | cpu->status.zero = 0; |
| 133 | cpu->status.carry = 0; |
| 134 | if (cpu->regs[reg] < mem) |
| 135 | { |
| 136 | cpu->status.negative = 1; |
| 137 | } |
| 138 | else if (cpu->regs[reg] == mem) |
| 139 | { |
| 140 | cpu->status.zero = 1; |
| 141 | cpu->status.carry = 1; |
| 142 | } |
| 143 | else |
| 144 | { |
| 145 | cpu->status.carry = 1; |
| 146 | } |
| 147 | } |
| 148 | |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 149 | uint16_t scr_dirty(cpu_t *cpu, uint16_t mem) |
| 150 | { |
| 151 | if (mem >= 0x200 && mem <= 0x200 + 32 * 32) |
| 152 | cpu->screen_dirty = true; |
| 153 | |
| 154 | return mem; |
| 155 | } |
| 156 | |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 157 | void execute(cpu_t *cpu, const char *mnemonic, uint8_t op, arg_t a, uint8_t am) |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 158 | { |
| 159 | // used to save space |
| 160 | #define REGS \ |
| 161 | R(X) R(A) R(Y) |
| 162 | |
swissChili | 710d18d | 2020-07-29 19:43:20 -0700 | [diff] [blame] | 163 | switch (op) { |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 164 | // Load and store instructions: |
| 165 | #define R(reg) \ |
| 166 | case LD##reg: \ |
| 167 | cpu->regs[reg] = a.val; \ |
| 168 | stat_nz(cpu, a.val); \ |
| 169 | break; |
| 170 | |
| 171 | REGS |
| 172 | |
| 173 | #undef R |
| 174 | |
| 175 | #define R(reg) \ |
| 176 | case ST##reg: \ |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 177 | cpu->mem[scr_dirty(cpu, a.ptr)] = cpu->regs[reg]; \ |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 178 | break; \ |
| 179 | |
| 180 | REGS |
| 181 | |
| 182 | #undef R |
| 183 | |
| 184 | // Arithmetic instructions: |
| 185 | // NOTE: binary coded decimals are NOT SUPPORTED because I don't want |
| 186 | // to implement them. |
| 187 | case ADC: |
| 188 | { |
| 189 | uint8_t sum = cpu->regs[A] + a.val + cpu->status.carry; |
| 190 | // signed overflow |
| 191 | stat_cv(cpu, cpu->regs[A], a.val + cpu->status.carry, sum); |
| 192 | stat_nz(cpu, sum); |
| 193 | cpu->regs[A] = sum; |
| 194 | break; |
| 195 | } |
| 196 | |
| 197 | case SBC: |
| 198 | { |
| 199 | uint8_t diff = cpu->regs[A] - a.val - !cpu->status.carry; |
| 200 | stat_cv(cpu, cpu->regs[A], a.val - !cpu->status.carry, diff); |
| 201 | stat_nz(cpu, diff); |
| 202 | cpu->regs[A] = diff; |
| 203 | break; |
| 204 | } |
| 205 | |
| 206 | case INC: |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 207 | cpu->mem[scr_dirty(cpu, scr_dirty(cpu, a.ptr))]++; |
| 208 | stat_nz(cpu, cpu->mem[scr_dirty(cpu, a.ptr)]); |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 209 | break; |
| 210 | |
| 211 | case INX: |
| 212 | cpu->regs[X]++; |
| 213 | stat_nz(cpu, cpu->regs[X]); |
| 214 | break; |
| 215 | |
| 216 | case INY: |
| 217 | cpu->regs[Y]++; |
| 218 | stat_nz(cpu, cpu->regs[Y]); |
| 219 | break; |
| 220 | |
| 221 | case DEC: |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 222 | cpu->mem[scr_dirty(cpu, a.ptr)]--; |
| 223 | stat_nz(cpu, cpu->mem[scr_dirty(cpu, a.ptr)]); |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 224 | break; |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 225 | |
| 226 | case DEX: |
| 227 | cpu->regs[X]--; |
| 228 | stat_nz(cpu, cpu->regs[X]); |
| 229 | break; |
| 230 | |
| 231 | case DEY: |
| 232 | cpu->regs[Y]--; |
| 233 | stat_nz(cpu, cpu->regs[Y]); |
| 234 | break; |
| 235 | |
| 236 | case ASL: |
| 237 | // This check must be done here unfortunately, it would be nice |
| 238 | // to do this while decoding operands but it would require |
| 239 | // a substantial change to the architecture of the emulator |
| 240 | if (am == AM_ACC) |
| 241 | { |
| 242 | cpu->status.carry = cpu->regs[A] >> 7; |
| 243 | cpu->regs[A] <<= 1; |
| 244 | stat_nz(cpu, cpu->regs[A]); |
| 245 | } |
| 246 | else |
| 247 | { |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 248 | cpu->status.carry = cpu->mem[scr_dirty(cpu, a.val)] >> 7; |
| 249 | cpu->mem[scr_dirty(cpu, a.ptr)] <<= 1; |
| 250 | stat_nz(cpu, cpu->mem[scr_dirty(cpu, a.ptr)]); |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 251 | } |
| 252 | break; |
| 253 | |
| 254 | case LSR: |
| 255 | if (am == AM_ACC) |
| 256 | { |
| 257 | cpu->status.carry = cpu->regs[A] & 1; |
| 258 | cpu->regs[A] >>= 1; |
| 259 | stat_nz(cpu, cpu->regs[A]); |
| 260 | } |
| 261 | else |
| 262 | { |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 263 | cpu->status.carry = cpu->mem[scr_dirty(cpu, a.val)] & 7; |
| 264 | cpu->mem[scr_dirty(cpu, a.ptr)] >>= 1; |
| 265 | stat_nz(cpu, cpu->mem[scr_dirty(cpu, a.ptr)]); |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 266 | } |
| 267 | break; |
| 268 | |
| 269 | case ROL: |
| 270 | if (am == AM_ACC) |
| 271 | { |
| 272 | cpu->status.carry = cpu->regs[A] >> 7; |
| 273 | cpu->regs[A] = rol(cpu->regs[A], 1); |
| 274 | stat_nz(cpu, cpu->regs[A]); |
| 275 | } |
| 276 | else |
| 277 | { |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 278 | cpu->status.carry = cpu->mem[scr_dirty(cpu, a.val)] >> 7; |
| 279 | cpu->mem[scr_dirty(cpu, a.ptr)] = rol(a.val, 1); |
| 280 | stat_nz(cpu, cpu->mem[scr_dirty(cpu, a.ptr)]); |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 281 | } |
| 282 | break; |
| 283 | |
| 284 | case ROR: |
| 285 | if (am == AM_ACC) |
| 286 | { |
| 287 | cpu->status.carry = cpu->regs[A] & 1; |
| 288 | cpu->regs[A] = ror(cpu->regs[A], 1); |
| 289 | stat_nz(cpu, cpu->regs[A]); |
| 290 | } |
| 291 | else |
| 292 | { |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 293 | cpu->status.carry = cpu->mem[scr_dirty(cpu, a.val)] & 1; |
| 294 | cpu->mem[scr_dirty(cpu, a.ptr)] = ror(a.val, 1); |
| 295 | stat_nz(cpu, cpu->mem[scr_dirty(cpu, a.ptr)]); |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 296 | } |
| 297 | break; |
| 298 | |
| 299 | case AND: |
| 300 | cpu->regs[A] &= a.val; |
| 301 | stat_nz(cpu, cpu->regs[A]); |
| 302 | break; |
| 303 | |
| 304 | case ORA: |
| 305 | cpu->regs[A] |= a.val; |
| 306 | stat_nz(cpu, cpu->regs[A]); |
| 307 | break; |
| 308 | |
| 309 | case EOR: |
| 310 | cpu->regs[A] ^= a.val; |
| 311 | stat_nz(cpu, cpu->regs[A]); |
| 312 | break; |
| 313 | |
| 314 | case CMP: |
| 315 | cmp(cpu, A, a.val); |
| 316 | break; |
| 317 | |
| 318 | case CPX: |
| 319 | cmp(cpu, X, a.val); |
| 320 | break; |
| 321 | |
| 322 | case CPY: |
| 323 | cmp(cpu, Y, a.val); |
| 324 | break; |
| 325 | |
| 326 | // TODO: implement BIT here |
| 327 | |
| 328 | #define BRANCHES \ |
| 329 | B(BCC, carry == 0) \ |
| 330 | B(BCS, carry == 1) \ |
| 331 | B(BNE, zero == 0) \ |
| 332 | B(BEQ, zero == 1) \ |
| 333 | B(BPL, negative == 0) \ |
| 334 | B(BMI, negative == 1) \ |
| 335 | B(BVC, overflow == 0) \ |
| 336 | B(BVS, overflow == 1) |
| 337 | |
| 338 | #define B(i, c) \ |
| 339 | case i: \ |
| 340 | if (cpu->status . c) \ |
| 341 | cpu->pc = a.ptr;\ |
| 342 | break; |
| 343 | |
| 344 | BRANCHES |
| 345 | |
| 346 | #undef B |
| 347 | #undef BRANCHES |
| 348 | |
| 349 | #define TRANSFERS \ |
| 350 | T(A, X) \ |
| 351 | T(X, A) \ |
| 352 | T(A, Y) \ |
| 353 | T(Y, A) |
| 354 | |
| 355 | #define T(a, b) \ |
| 356 | case T ## a ## b: \ |
| 357 | cpu->regs[b] = cpu->regs[a]; \ |
| 358 | stat_nz(cpu, cpu->regs[b]); \ |
| 359 | break; |
| 360 | |
| 361 | TRANSFERS |
| 362 | |
| 363 | #undef T |
| 364 | #undef TRANSFERS |
| 365 | |
| 366 | case TSX: |
| 367 | cpu->regs[X] = cpu->regs[SP]; |
| 368 | stat_nz(cpu, cpu->regs[X]); |
| 369 | break; |
| 370 | |
| 371 | case TXS: |
| 372 | cpu->regs[SP] = cpu->regs[X]; |
| 373 | stat_nz(cpu, cpu->regs[X]); |
| 374 | break; |
| 375 | |
| 376 | case PHA: |
| 377 | stack_push(cpu, cpu->regs[A]); |
| 378 | break; |
| 379 | |
| 380 | case PLA: |
| 381 | cpu->regs[A] = stack_pop(cpu); |
| 382 | stat_nz(cpu, cpu->regs[A]); |
| 383 | break; |
| 384 | |
| 385 | case PHP: |
| 386 | stack_push(cpu, *(uint8_t *)(&cpu->status)); |
| 387 | break; |
| 388 | |
| 389 | case PLP: |
| 390 | { |
| 391 | uint8_t s = stack_pop(cpu); |
| 392 | *(uint8_t *)(&cpu->status) = s; |
| 393 | } |
| 394 | |
| 395 | case JMP: |
| 396 | cpu->pc = a.ptr; |
| 397 | break; |
| 398 | |
| 399 | case JSR: |
| 400 | stack_pushle(cpu, cpu->pc); |
swissChili | b04a402 | 2020-08-09 12:51:00 -0700 | [diff] [blame] | 401 | cpu->pc = a.ptr; |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 402 | break; |
| 403 | |
| 404 | case RTS: |
| 405 | cpu->pc = stack_pople(cpu); |
| 406 | break; |
| 407 | |
| 408 | // TODO: implement RTI |
| 409 | // TODO: implement flag instructions |
| 410 | |
| 411 | case BRK: |
| 412 | // TODO: trigger an interrupt |
| 413 | cpu->running = false; |
| 414 | break; |
| 415 | |
| 416 | case NOP: |
| 417 | break; |
| 418 | |
| 419 | default: |
swissChili | b71e027 | 2020-08-08 15:56:14 -0700 | [diff] [blame] | 420 | warn("Unsupported opcode: %x\n", op); |
| 421 | THROW("Unsupported opcode"); |
swissChili | 710d18d | 2020-07-29 19:43:20 -0700 | [diff] [blame] | 422 | } |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 423 | #undef REGS |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 424 | } |
| 425 | |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 426 | uint16_t fetch_le(cpu_t *cpu) |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 427 | { |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 428 | uint8_t a = cpu->mem[scr_dirty(cpu, cpu->pc++)]; |
| 429 | uint8_t b = cpu->mem[scr_dirty(cpu, cpu->pc++)]; |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 430 | return le_to_native(a, b); |
| 431 | } |
| 432 | |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 433 | arg_t arg_imm(uint16_t a) |
swissChili | 710d18d | 2020-07-29 19:43:20 -0700 | [diff] [blame] | 434 | { |
| 435 | return (arg_t){ a, a }; |
| 436 | } |
| 437 | |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 438 | arg_t arg_ptr(cpu_t *c, uint flags, uint16_t p) |
swissChili | 710d18d | 2020-07-29 19:43:20 -0700 | [diff] [blame] | 439 | { |
| 440 | if (flags & FETCH_NO_INDIRECTION) |
| 441 | return arg_imm(p); |
| 442 | |
| 443 | return (arg_t){ c->mem[p], p }; |
| 444 | } |
| 445 | |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 446 | arg_t arg(uint16_t v, uint16_t a) |
swissChili | 710d18d | 2020-07-29 19:43:20 -0700 | [diff] [blame] | 447 | { |
| 448 | return (arg_t){ v, a }; |
| 449 | } |
| 450 | |
| 451 | arg_t fetch_addr(cpu_t *cpu, uint8_t am, uint f) |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 452 | { |
| 453 | switch (am) |
| 454 | { |
| 455 | case AM_ACC: |
| 456 | case AM_IMP: |
swissChili | 710d18d | 2020-07-29 19:43:20 -0700 | [diff] [blame] | 457 | return arg_imm(0); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 458 | |
| 459 | // In both cases return immediate 8 bit value |
| 460 | case AM_IMM: |
| 461 | case AM_ZP: |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 462 | return arg_imm(cpu->mem[scr_dirty(cpu, cpu->pc++)]); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 463 | |
| 464 | case AM_ABS: |
swissChili | 710d18d | 2020-07-29 19:43:20 -0700 | [diff] [blame] | 465 | return arg_ptr(cpu, f, fetch_le(cpu)); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 466 | |
| 467 | case AM_REL: |
| 468 | { |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 469 | // Aparently, PC should will point to the NEXT opcode |
| 470 | // I can't find any documentation on this unfortunately, but |
| 471 | // I have discovered this through testing the output of other |
| 472 | // assemblers. |
| 473 | uint16_t pc = cpu->pc + 1; |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 474 | return arg_ptr(cpu, f, (int8_t)cpu->mem[scr_dirty(cpu, cpu->pc++)] + pc); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 475 | } |
| 476 | |
| 477 | case AM_IND: |
| 478 | { |
| 479 | uint16_t addr = fetch_le(cpu); |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 480 | |
| 481 | if (f & FETCH_NO_INDIRECTION) |
| 482 | return arg_imm(addr); |
| 483 | |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 484 | uint8_t low = cpu->mem[scr_dirty(cpu, addr)], |
| 485 | high = cpu->mem[scr_dirty(cpu, addr + 1)]; |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 486 | |
swissChili | 710d18d | 2020-07-29 19:43:20 -0700 | [diff] [blame] | 487 | return arg_ptr(cpu, f, le_to_native(low, high)); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 488 | } |
| 489 | |
| 490 | case AM_AX: |
swissChili | 94ba1f5 | 2020-08-08 11:39:10 -0700 | [diff] [blame] | 491 | if (f & FETCH_NO_INDIRECTION) |
| 492 | return arg_ptr(cpu, f, fetch_le(cpu)); |
| 493 | |
swissChili | 710d18d | 2020-07-29 19:43:20 -0700 | [diff] [blame] | 494 | return arg_ptr(cpu, f, fetch_le(cpu) + cpu->regs[X]); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 495 | |
| 496 | case AM_AY: |
swissChili | 94ba1f5 | 2020-08-08 11:39:10 -0700 | [diff] [blame] | 497 | if (f & FETCH_NO_INDIRECTION) |
| 498 | return arg_ptr(cpu, f, fetch_le(cpu)); |
| 499 | |
swissChili | 710d18d | 2020-07-29 19:43:20 -0700 | [diff] [blame] | 500 | return arg_ptr(cpu, f, fetch_le(cpu) + cpu->regs[Y]); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 501 | |
| 502 | case AM_ZPX: |
swissChili | 94ba1f5 | 2020-08-08 11:39:10 -0700 | [diff] [blame] | 503 | if (f & FETCH_NO_INDIRECTION) |
swissChili | b71e027 | 2020-08-08 15:56:14 -0700 | [diff] [blame] | 504 | return arg_ptr(cpu, f, cpu->mem[cpu->pc++]); |
| 505 | return arg_ptr(cpu, f, cpu->mem[cpu->pc++] + cpu->regs[X]); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 506 | |
| 507 | case AM_ZPY: |
swissChili | 94ba1f5 | 2020-08-08 11:39:10 -0700 | [diff] [blame] | 508 | if (f & FETCH_NO_INDIRECTION) |
swissChili | b71e027 | 2020-08-08 15:56:14 -0700 | [diff] [blame] | 509 | return arg_ptr(cpu, f, cpu->mem[cpu->pc++]); |
| 510 | return arg_ptr(cpu, f, cpu->mem[cpu->pc++] + cpu->regs[Y]); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 511 | |
| 512 | case AM_ZIX: |
| 513 | { |
swissChili | b71e027 | 2020-08-08 15:56:14 -0700 | [diff] [blame] | 514 | uint8_t zp = cpu->mem[cpu->pc++]; |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 515 | |
| 516 | if (f & FETCH_NO_INDIRECTION) |
| 517 | return arg_imm(zp); |
| 518 | |
swissChili | 710d18d | 2020-07-29 19:43:20 -0700 | [diff] [blame] | 519 | uint16_t addr = zp + cpu->regs[X]; |
swissChili | b71e027 | 2020-08-08 15:56:14 -0700 | [diff] [blame] | 520 | uint16_t indirect = le_to_native(cpu->mem[addr], cpu->mem[addr + 1]); |
swissChili | 710d18d | 2020-07-29 19:43:20 -0700 | [diff] [blame] | 521 | return arg_ptr(cpu, f, indirect); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 522 | } |
| 523 | |
| 524 | case AM_ZIY: |
| 525 | { |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 526 | uint8_t zp = cpu->mem[scr_dirty(cpu, cpu->pc++)]; |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 527 | |
| 528 | if (f & FETCH_NO_INDIRECTION) |
| 529 | return arg_imm(zp); |
| 530 | |
swissChili | b71e027 | 2020-08-08 15:56:14 -0700 | [diff] [blame] | 531 | uint16_t base = le_to_native(cpu->mem[zp], cpu->mem[scr_dirty(cpu, zp + 1)]); |
swissChili | 710d18d | 2020-07-29 19:43:20 -0700 | [diff] [blame] | 532 | return arg_ptr(cpu, f, base + cpu->regs[Y]); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 533 | } |
| 534 | |
| 535 | default: |
swissChili | b71e027 | 2020-08-08 15:56:14 -0700 | [diff] [blame] | 536 | warn("Unknown address mode %x", am); |
| 537 | THROW("Unknowng address mode"); |
swissChili | 710d18d | 2020-07-29 19:43:20 -0700 | [diff] [blame] | 538 | __builtin_unreachable(); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 539 | } |
| 540 | } |
| 541 | |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 542 | void step(cpu_t *cpu) |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 543 | { |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 544 | cpu->screen_dirty = false; |
swissChili | b71e027 | 2020-08-08 15:56:14 -0700 | [diff] [blame] | 545 | uint8_t pc = cpu->pc; |
| 546 | uint8_t op = cpu->mem[cpu->pc++]; |
| 547 | switch (op) |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 548 | { |
| 549 | #define INST(mn, am, op) \ |
| 550 | case op: \ |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 551 | execute(cpu, #mn, mn, fetch_addr(cpu, am, 0), am); \ |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 552 | break; |
| 553 | |
| 554 | INSTRUCTIONS |
| 555 | |
| 556 | #undef INST |
| 557 | |
| 558 | default: |
swissChili | b71e027 | 2020-08-08 15:56:14 -0700 | [diff] [blame] | 559 | warn("Undefined opcode %x near %x [%x]", op, pc, cpu->mem[pc]); |
| 560 | THROW("Undefined opcode"); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 561 | } |
| 562 | } |
| 563 | |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 564 | int dump_inst(cpu_t *cpu, char *buf, const char *mn, uint16_t addr, uint8_t am) |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 565 | { |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 566 | char *end = buf; |
| 567 | end += sprintf(end, "%s ", mn); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 568 | |
| 569 | switch (am) |
| 570 | { |
| 571 | case AM_IMM: |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 572 | end += sprintf(end, "#"); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 573 | case AM_REL: |
| 574 | case AM_ABS: |
| 575 | case AM_ZP: |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 576 | end += sprintf(end, "$%x", addr); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 577 | break; |
| 578 | |
| 579 | case AM_IND: |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 580 | end += sprintf(end, "($%x)", addr); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 581 | break; |
| 582 | |
| 583 | case AM_AX: |
| 584 | case AM_ZPX: |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 585 | end += sprintf(end, "$%x, X", addr); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 586 | break; |
| 587 | |
| 588 | case AM_AY: |
| 589 | case AM_ZPY: |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 590 | end += sprintf(end, "$%x, Y", addr); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 591 | break; |
| 592 | |
| 593 | case AM_ZIX: |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 594 | end += sprintf(end, "($%x, X)", addr); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 595 | break; |
| 596 | |
| 597 | case AM_ZIY: |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 598 | end += sprintf(end, "($%x), Y", addr); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 599 | break; |
| 600 | } |
| 601 | |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 602 | return end - buf; |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 603 | } |
| 604 | |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 605 | char *disas_step(cpu_t *cpu) |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 606 | { |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 607 | char *buffer = malloc(80); |
| 608 | char *end = buffer; |
| 609 | |
| 610 | // end += sprintf(buffer, "$%x", cpu->pc); |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 611 | uint8_t op = cpu->mem[scr_dirty(cpu, cpu->pc++)]; |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 612 | switch (op) |
| 613 | { |
| 614 | #define INST(mn, am, op) \ |
| 615 | case op: \ |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 616 | end += dump_inst(cpu, end, #mn, \ |
swissChili | 710d18d | 2020-07-29 19:43:20 -0700 | [diff] [blame] | 617 | fetch_addr(cpu, am, FETCH_NO_INDIRECTION).ptr, am); \ |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 618 | break; |
| 619 | |
| 620 | INSTRUCTIONS |
| 621 | |
| 622 | #undef INST |
| 623 | |
| 624 | default: |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 625 | end += sprintf(end, "Undefined opcode %x", op); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 626 | } |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 627 | |
| 628 | *end = 0; |
| 629 | |
| 630 | return buffer; |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 631 | } |
| 632 | |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 633 | void disas_num(cpu_t *cpu, uint16_t num) |
| 634 | { |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 635 | uint16_t pc = cpu->pc; |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 636 | for (int i = 0; i < num; i++) |
| 637 | { |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 638 | uint16_t last_pc = cpu->pc; |
| 639 | char *line = disas_step(cpu); |
| 640 | printf("$%x\t%s\n", last_pc, line); |
| 641 | free(line); |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 642 | } |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 643 | cpu->pc = pc; |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 644 | } |
| 645 | |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 646 | void disas(cpu_t *cpu) |
| 647 | { |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 648 | uint16_t pc = cpu->pc; |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 649 | // Raw binary, no way to know what's code what isn't |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 650 | while (cpu->pc < 0xFFFF) |
| 651 | { |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 652 | uint16_t last_pc = cpu->pc; |
| 653 | char *line = disas_step(cpu); |
| 654 | printf("$%x\t%s\n", last_pc, line); |
| 655 | free(line); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 656 | } |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 657 | cpu->pc = pc; |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 658 | } |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 659 | |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 660 | void run(cpu_t *cpu) |
| 661 | { |
| 662 | while (cpu->running) |
| 663 | { |
| 664 | step(cpu); |
| 665 | } |
| 666 | |
| 667 | printf("CPU Halted\n"); |
| 668 | } |
swissChili | c6b4f7e | 2020-08-09 16:36:36 -0700 | [diff] [blame^] | 669 | |
| 670 | void run_mq(cpu_t *cpu, mqd_t mq) |
| 671 | { |
| 672 | char buf[MQ_BUF_LEN]; |
| 673 | bool running; |
| 674 | |
| 675 | while (true) |
| 676 | { |
| 677 | if (running) |
| 678 | { |
| 679 | if (cpu->running) |
| 680 | step(cpu); |
| 681 | else |
| 682 | running = false; |
| 683 | } |
| 684 | |
| 685 | ssize_t recvd = mq_receive(mq, buf, MQ_BUF_LEN * 2, NULL); |
| 686 | |
| 687 | if (recvd == -1 && errno != EAGAIN) |
| 688 | { |
| 689 | printf("errno = %d\n", errno); |
| 690 | THROW("mq_receive returned -1"); |
| 691 | } |
| 692 | |
| 693 | if (recvd > 0) |
| 694 | { |
| 695 | if (debug_stmt(cpu, buf, &running)) |
| 696 | break; |
| 697 | } |
| 698 | } |
| 699 | } |