swissChili | defeb0d | 2021-02-18 15:28:36 -0800 | [diff] [blame] | 1 | #include "timer.h" |
swissChili | defeb0d | 2021-02-18 15:28:36 -0800 | [diff] [blame] | 2 | #include "io.h" |
swissChili | 825d46b | 2021-02-21 10:14:16 -0800 | [diff] [blame] | 3 | #include "log.h" |
4 | #include "pic.h" | ||||
5 | #include "registers.h" | ||||
swissChili | defeb0d | 2021-02-18 15:28:36 -0800 | [diff] [blame] | 6 | |
7 | static ulong tick = 0; | ||||
8 | |||||
swissChili | 19ef418 | 2021-02-21 17:45:51 -0800 | [diff] [blame] | 9 | static void timer_cb(struct registers *regs) |
swissChili | defeb0d | 2021-02-18 15:28:36 -0800 | [diff] [blame] | 10 | { |
swissChili | 19ef418 | 2021-02-21 17:45:51 -0800 | [diff] [blame] | 11 | // do nothing :) |
swissChili | defeb0d | 2021-02-18 15:28:36 -0800 | [diff] [blame] | 12 | } |
13 | |||||
14 | void init_timer(uint hz) | ||||
15 | { | ||||
16 | add_interrupt_handler(IRQ_TO_INT(0), timer_cb); | ||||
17 | |||||
18 | uint divisor = TIMER_FREQ / hz; | ||||
19 | |||||
swissChili | defeb0d | 2021-02-18 15:28:36 -0800 | [diff] [blame] | 20 | outb(0x43, 0x36); |
21 | io_wait(); | ||||
swissChili | 825d46b | 2021-02-21 10:14:16 -0800 | [diff] [blame] | 22 | uchar l = divisor & 0xff, h = (divisor >> 8) & 0xff; |
swissChili | defeb0d | 2021-02-18 15:28:36 -0800 | [diff] [blame] | 23 | |
24 | outb(0x40, l); | ||||
25 | io_wait(); | ||||
26 | outb(0x40, h); | ||||
27 | io_wait(); | ||||
swissChili | defeb0d | 2021-02-18 15:28:36 -0800 | [diff] [blame] | 28 | } |