blob: a9a06efd7696c23dce5f3aa6b6ab88b8ddc9da67 [file] [log] [blame]
swissChili9b3584b2021-02-18 13:57:27 -08001#include "pic.h"
2#include "io.h"
swissChili825d46b2021-02-21 10:14:16 -08003#include "log.h"
swissChili9b3584b2021-02-18 13:57:27 -08004
swissChili825d46b2021-02-21 10:14:16 -08005#define ICW1_ICW4 0x01 /* ICW4 (not) needed */
6#define ICW1_SINGLE 0x02 /* Single (cascade) mode */
7#define ICW1_INTERVAL4 0x04 /* Call address interval 4 (8) */
8#define ICW1_LEVEL 0x08 /* Level triggered (edge) mode */
9#define ICW1_INIT 0x10 /* Initialization - required! */
swissChilidefeb0d2021-02-18 15:28:36 -080010
swissChili825d46b2021-02-21 10:14:16 -080011#define ICW4_8086 0x01 /* 8086/88 (MCS-80/85) mode */
12#define ICW4_AUTO 0x02 /* Auto (normal) EOI */
13#define ICW4_BUF_SLAVE 0x08 /* Buffered mode/slave */
14#define ICW4_BUF_MASTER 0x0C /* Buffered mode/master */
15#define ICW4_SFNM 0x10 /* Special fully nested (not) */
swissChilidefeb0d2021-02-18 15:28:36 -080016
swissChiliaed6ff32021-05-29 17:51:04 -070017typedef void (*interrupt_handler_t)(struct registers *);
18
19static interrupt_handler_t interrupt_handlers[256];
swissChili9b3584b2021-02-18 13:57:27 -080020
21void pic_send_eoi(uchar interrupt)
22{
swissChilidefeb0d2021-02-18 15:28:36 -080023 if (interrupt >= IRQ_TO_INT(8))
swissChili9b3584b2021-02-18 13:57:27 -080024 outb(PIC2_COMMAND, PIC_EOI);
swissChilidefeb0d2021-02-18 15:28:36 -080025
swissChili9b3584b2021-02-18 13:57:27 -080026 outb(PIC1_COMMAND, PIC_EOI);
27}
28
29void irq_handler(struct registers regs)
30{
31 pic_send_eoi(regs.interrupt_number);
32
33 if (interrupt_handlers[regs.interrupt_number])
swissChili825d46b2021-02-21 10:14:16 -080034 interrupt_handlers[regs.interrupt_number](&regs);
35 else
36 kprintf("Unhandled hardware interrupt: %d, called from %d\n", regs.interrupt_number, regs.eip);
swissChili9b3584b2021-02-18 13:57:27 -080037}
38
swissChili825d46b2021-02-21 10:14:16 -080039void isr_handler(struct registers regs)
40{
41 if (interrupt_handlers[regs.interrupt_number])
42 interrupt_handlers[regs.interrupt_number](&regs);
43 else
44 kprintf("Unhandled interrupt: %d, called from %d\n", regs.interrupt_number, regs.eip);
45}
46
47void add_interrupt_handler(uchar interrupt, void (*handler)(struct registers *))
swissChili9b3584b2021-02-18 13:57:27 -080048{
49 interrupt_handlers[interrupt] = handler;
50}
swissChilidefeb0d2021-02-18 15:28:36 -080051
52void pic_remap()
53{
swissChili825d46b2021-02-21 10:14:16 -080054 outb(0x20, 0x11);
55 outb(0xA0, 0x11);
56 outb(0x21, 0x20);
57 outb(0xA1, 0x28);
58 outb(0x21, 0x04);
59 outb(0xA1, 0x02);
60 outb(0x21, 0x01);
61 outb(0xA1, 0x01);
62 outb(0x21, 0x0);
63 outb(0xA1, 0x0);
swissChilidefeb0d2021-02-18 15:28:36 -080064
swissChiliaed6ff32021-05-29 17:51:04 -070065 memset(interrupt_handlers, 0, sizeof(interrupt_handlers));
swissChilidefeb0d2021-02-18 15:28:36 -080066}