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swissChili6c61a792020-07-28 16:29:20 -07001#pragma once
2
3#include <stdint.h>
4
5enum // Registers
6{
7 A, X, Y, SR, SP
8};
9
10enum // Flags
11{
12 CARRY = 1 << 0,
13 ZERO = 1 << 1,
14 NO_INT = 1 << 2,
15 DECIMAL = 1 << 3,
16 BREAK = 1 << 4,
17 UNUSED = 1 << 5,
18 OVERFLW = 1 << 6,
19 NEGATIV = 1 << 7,
20};
21
22enum // Address Modes
23{
24 AM_ACC, // Accumulator implied as operand
25 AM_IMP, // Implied operand
26 AM_IMM, // Immediate operand (8 bit)
27 AM_ABS, // Absolute operand (16 bit)
28 AM_ZP, // Zero-page operand
29 AM_REL, // Relative operand (signed 8 bit)
30 AM_IND, // Absolute indirect operand (16 bit address of 16 bit address)
31 AM_AX, // Absolute indexed with X
32 AM_AY, // Absolute indexed with Y
33 AM_ZPX, // Zero-page indexed with X
34 AM_ZPY, // Zero-page indexed with Y
35 AM_ZIX, // Zero-page indexed indirect (zp,x)
36 AM_ZIY, // Zero-page indirect indexed (zp),y
37};
38
39enum // Opcodes
40{
41 LDA,
42 LDX,
43 LDY,
44 STA,
45 STX,
46 STY,
47 ADC,
48 SBC,
49 INC,
50 INX,
51 INY,
52 DEC,
53 DEX,
54 DEY,
55 ASL,
56 LSR,
57 ROL,
58 ROR,
59 AND,
60 ORA,
61 EOR,
62 CMP,
63 CPX,
64 CPY,
65 BIT,
66 BCC,
67 BCS,
68 BNE,
69 BEQ,
70 BPL,
71 BMI,
72 BVC,
73 BVS,
74 TAX,
75 TXA,
76 TAY,
77 TYA,
78 TSX,
79 TXS,
80 PHA,
81 PLA,
82 PHP,
83 PLP,
84 JMP,
85 JSR,
86 RTS,
87 RTI,
88 CLC,
89 SEC,
90 CLD,
91 SED,
92 CLI,
93 SEI,
94 CLV,
95 BRK,
96 NOP,
97};
98
swissChili710d18d2020-07-29 19:43:20 -070099enum // Fetch flags
100{
101 FETCH_NO_INDIRECTION = 1, // Do not follow indirection (used for disassembly)
102};
103
swissChili6c61a792020-07-28 16:29:20 -0700104// Emulator instance, create with new_cpu()
105typedef struct
106{
107 uint8_t regs[5]; // A, X, Y, SP and SR registers
108 uint16_t pc;
109 uint8_t *mem;
110} cpu_t;
111
112// Argument type, includes both pointer and its value
113typedef struct
114{
115 uint16_t val; // Value at pointer (used by most instructions)
116 uint16_t ptr; // Pointer (used by jumps, etc)
117} arg_t;
118
119cpu_t new_cpu();
120void free_cpu(cpu_t *cpu);
121void die(const char *message);
122void disas(cpu_t *cpu);