Add disassembler
diff --git a/instructions.h b/instructions.h
new file mode 100644
index 0000000..ba3d99d
--- /dev/null
+++ b/instructions.h
@@ -0,0 +1,161 @@
+#pragma once
+
+// AUTO GENERATED FILE, DO NOT EDIT BY HAND
+#define INSTRUCTIONS \
+ INST(ADC, AM_IMM, 0x69 ) \
+ INST(ADC, AM_ZP, 0x65 ) \
+ INST(ADC, AM_ZPX, 0x75 ) \
+ INST(ADC, AM_ABS, 0x6d ) \
+ INST(ADC, AM_AX, 0x7d ) \
+ INST(ADC, AM_AY, 0x79 ) \
+ INST(ADC, AM_ZIX, 0x61 ) \
+ INST(ADC, AM_ZIY, 0x71 ) \
+ INST(AND, AM_IMM, 0x29 ) \
+ INST(AND, AM_ZP, 0x25 ) \
+ INST(AND, AM_ZPX, 0x35 ) \
+ INST(AND, AM_ABS, 0x2d ) \
+ INST(AND, AM_AX, 0x3d ) \
+ INST(AND, AM_AY, 0x39 ) \
+ INST(AND, AM_ZIX, 0x21 ) \
+ INST(AND, AM_ZIY, 0x31 ) \
+ INST(ASL, AM_ACC, 0x0a ) \
+ INST(ASL, AM_ZP, 0x06 ) \
+ INST(ASL, AM_ZPX, 0x16 ) \
+ INST(ASL, AM_ABS, 0x0e ) \
+ INST(ASL, AM_AX, 0x1e ) \
+ INST(BCC, AM_REL, 0x90 ) \
+ INST(BCS, AM_REL, 0xB0 ) \
+ INST(BEQ, AM_REL, 0xF0 ) \
+ INST(BMI, AM_REL, 0x30 ) \
+ INST(BNE, AM_REL, 0xD0 ) \
+ INST(BPL, AM_REL, 0x10 ) \
+ INST(BVC, AM_REL, 0x50 ) \
+ INST(BVS, AM_REL, 0x70 ) \
+ INST(BIT, AM_ZP, 0x24 ) \
+ INST(BIT, AM_ABS, 0x2c ) \
+ INST(BIT, AM_IMM, 0x89 ) \
+ INST(BIT, AM_ZPX, 0x34 ) \
+ INST(BIT, AM_AX, 0x3c ) \
+ INST(BRK, AM_IMP, 0x00 ) \
+ INST(CLC, AM_IMP, 0x18 ) \
+ INST(CLD, AM_IMP, 0xd8 ) \
+ INST(CLI, AM_IMP, 0x58 ) \
+ INST(CLV, AM_IMP, 0xb8 ) \
+ INST(NOP, AM_IMP, 0xea ) \
+ INST(PHA, AM_IMP, 0x48 ) \
+ INST(PLA, AM_IMP, 0x68 ) \
+ INST(PHP, AM_IMP, 0x08 ) \
+ INST(PLP, AM_IMP, 0x28 ) \
+ INST(RTI, AM_IMP, 0x40 ) \
+ INST(RTS, AM_IMP, 0x60 ) \
+ INST(SEC, AM_IMP, 0x38 ) \
+ INST(SED, AM_IMP, 0xf8 ) \
+ INST(SEI, AM_IMP, 0x78 ) \
+ INST(TAX, AM_IMP, 0xaa ) \
+ INST(TXA, AM_IMP, 0x8a ) \
+ INST(TAY, AM_IMP, 0xa8 ) \
+ INST(TYA, AM_IMP, 0x98 ) \
+ INST(TSX, AM_IMP, 0xba ) \
+ INST(TXS, AM_IMP, 0x9a ) \
+ INST(CMP, AM_IMM, 0xc9 ) \
+ INST(CMP, AM_ZP, 0xc5 ) \
+ INST(CMP, AM_ZPX, 0xd5 ) \
+ INST(CMP, AM_ABS, 0xcd ) \
+ INST(CMP, AM_AX, 0xdd ) \
+ INST(CMP, AM_AY, 0xd9 ) \
+ INST(CMP, AM_ZIX, 0xc1 ) \
+ INST(CMP, AM_ZIY, 0xd1 ) \
+ INST(CPX, AM_IMM, 0xe0 ) \
+ INST(CPX, AM_ZP, 0xe4 ) \
+ INST(CPX, AM_ABS, 0xec ) \
+ INST(CPY, AM_IMM, 0xc0 ) \
+ INST(CPY, AM_ZP, 0xc4 ) \
+ INST(CPY, AM_ABS, 0xcc ) \
+ INST(DEC, AM_ZP, 0xc6 ) \
+ INST(DEC, AM_ZPX, 0xd6 ) \
+ INST(DEC, AM_ABS, 0xce ) \
+ INST(DEC, AM_AX, 0xde ) \
+ INST(DEC, AM_ACC, 0x3a ) \
+ INST(DEX, AM_IMP, 0xca ) \
+ INST(DEY, AM_IMP, 0x88 ) \
+ INST(INX, AM_IMP, 0xe8 ) \
+ INST(INY, AM_IMP, 0xc8 ) \
+ INST(EOR, AM_IMM, 0x49 ) \
+ INST(EOR, AM_ZP, 0x45 ) \
+ INST(EOR, AM_ZPX, 0x55 ) \
+ INST(EOR, AM_ABS, 0x4d ) \
+ INST(EOR, AM_AX, 0x5d ) \
+ INST(EOR, AM_AY, 0x59 ) \
+ INST(EOR, AM_ZIX, 0x41 ) \
+ INST(EOR, AM_ZIY, 0x51 ) \
+ INST(INC, AM_ZP, 0xe6 ) \
+ INST(INC, AM_ZPX, 0xf6 ) \
+ INST(INC, AM_ABS, 0xee ) \
+ INST(INC, AM_AX, 0xfe ) \
+ INST(INC, AM_ACC, 0x1a ) \
+ INST(JMP, AM_ABS, 0x4c ) \
+ INST(JMP, AM_IND, 0x6c ) \
+ INST(JMP, AM_AX, 0x7c ) \
+ INST(JSR, AM_ABS, 0x20 ) \
+ INST(LDA, AM_IMM, 0xa9 ) \
+ INST(LDA, AM_ZP, 0xa5 ) \
+ INST(LDA, AM_ZPX, 0xb5 ) \
+ INST(LDA, AM_ABS, 0xad ) \
+ INST(LDA, AM_AX, 0xbd ) \
+ INST(LDA, AM_AY, 0xb9 ) \
+ INST(LDA, AM_ZIX, 0xa1 ) \
+ INST(LDA, AM_ZIY, 0xb1 ) \
+ INST(LDX, AM_IMM, 0xa2 ) \
+ INST(LDX, AM_ZP, 0xa6 ) \
+ INST(LDX, AM_ZPY, 0xb6 ) \
+ INST(LDX, AM_ABS, 0xae ) \
+ INST(LDX, AM_AY, 0xbe ) \
+ INST(LDY, AM_IMM, 0xa0 ) \
+ INST(LDY, AM_ZP, 0xa4 ) \
+ INST(LDY, AM_ZPX, 0xb4 ) \
+ INST(LDY, AM_ABS, 0xac ) \
+ INST(LDY, AM_AX, 0xbc ) \
+ INST(LSR, AM_ACC, 0x4a ) \
+ INST(LSR, AM_ZP, 0x46 ) \
+ INST(LSR, AM_ZPX, 0x56 ) \
+ INST(LSR, AM_ABS, 0x4e ) \
+ INST(LSR, AM_AX, 0x5e ) \
+ INST(ORA, AM_IMM, 0x09 ) \
+ INST(ORA, AM_ZP, 0x05 ) \
+ INST(ORA, AM_ZPX, 0x15 ) \
+ INST(ORA, AM_ABS, 0x0d ) \
+ INST(ORA, AM_AX, 0x1d ) \
+ INST(ORA, AM_AY, 0x19 ) \
+ INST(ORA, AM_ZIX, 0x01 ) \
+ INST(ORA, AM_ZIY, 0x11 ) \
+ INST(ROL, AM_ACC, 0x2a ) \
+ INST(ROL, AM_ZP, 0x26 ) \
+ INST(ROL, AM_ZPX, 0x36 ) \
+ INST(ROL, AM_ABS, 0x2e ) \
+ INST(ROL, AM_AX, 0x3e ) \
+ INST(ROR, AM_ACC, 0x6a ) \
+ INST(ROR, AM_ZP, 0x66 ) \
+ INST(ROR, AM_ZPX, 0x76 ) \
+ INST(ROR, AM_ABS, 0x7e ) \
+ INST(ROR, AM_AX, 0x6e ) \
+ INST(SBC, AM_IMM, 0xe9 ) \
+ INST(SBC, AM_ZP, 0xe5 ) \
+ INST(SBC, AM_ZPX, 0xf5 ) \
+ INST(SBC, AM_ABS, 0xed ) \
+ INST(SBC, AM_AX, 0xfd ) \
+ INST(SBC, AM_AY, 0xf9 ) \
+ INST(SBC, AM_ZIX, 0xe1 ) \
+ INST(SBC, AM_ZIY, 0xf1 ) \
+ INST(STA, AM_ZP, 0x85 ) \
+ INST(STA, AM_ZPX, 0x95 ) \
+ INST(STA, AM_ABS, 0x8d ) \
+ INST(STA, AM_AX, 0x9d ) \
+ INST(STA, AM_AY, 0x99 ) \
+ INST(STA, AM_ZIX, 0x81 ) \
+ INST(STA, AM_ZIY, 0x91 ) \
+ INST(STX, AM_ZP, 0x86 ) \
+ INST(STX, AM_ZPY, 0x96 ) \
+ INST(STX, AM_ABS, 0x8e ) \
+ INST(STY, AM_ZP, 0x84 ) \
+ INST(STY, AM_ZPX, 0x94 ) \
+ INST(STY, AM_ABS, 0x8c ) \