| commit | defeb0daebb64ff294ab42dadbf3613d750891cb | [log] [tgz] |
|---|---|---|
| author | swissChili <swisschili@fastmail.com> | Thu Feb 18 15:28:36 2021 -0800 |
| committer | swissChili <swisschili@fastmail.com> | Thu Feb 18 15:28:36 2021 -0800 |
| tree | 52ed37fccf84a6038afc89674b36c0a835aa4523 | |
| parent | 9b3584bd27e29c8966ab90a70bf8b9e02a46e900 [diff] [blame] |
Add timer
diff --git a/src/idt.s b/src/idt.s index 756eed4..6ded21b 100644 --- a/src/idt.s +++ b/src/idt.s
@@ -61,10 +61,10 @@ isr_common: pusha ; Save all registers - mov ax, ds + mov ax, ds ; Save data segment push eax - mov ax, 0x10 + mov ax, 0x10 ; New segments mov ds, ax mov es, ax mov fs, ax @@ -72,7 +72,7 @@ call isr_handler - pop eax + pop eax ; Reset segments mov ds, ax mov es, ax mov fs, ax