swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 1 | #include "cpu.h" |
swissChili | b71e027 | 2020-08-08 15:56:14 -0700 | [diff] [blame] | 2 | #include "common.h" |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 3 | #include "instructions.h" |
| 4 | |
swissChili | c6b4f7e | 2020-08-09 16:36:36 -0700 | [diff] [blame] | 5 | #include "dbg.h" |
| 6 | #include <errno.h> |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 7 | #include <endian.h> |
| 8 | #include <stdio.h> |
| 9 | #include <stdlib.h> |
| 10 | #include <string.h> |
| 11 | |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 12 | |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 13 | #define warn(m, ...) \ |
| 14 | printf("\033[33m" m "\033[0m\n", ##__VA_ARGS__); |
| 15 | |
swissChili | 94ba1f5 | 2020-08-08 11:39:10 -0700 | [diff] [blame] | 16 | |
swissChili | dbbd540 | 2020-08-07 15:07:39 -0700 | [diff] [blame] | 17 | void reset(cpu_t *cpu) |
| 18 | { |
swissChili | b04a402 | 2020-08-09 12:51:00 -0700 | [diff] [blame] | 19 | cpu->regs[SP] = 0xFF; // stack at is 0x100 + SP |
swissChili | bb478f1 | 2020-08-07 20:45:07 -0700 | [diff] [blame] | 20 | cpu->pc = 0x600; // arbitrary program counter start |
swissChili | dbbd540 | 2020-08-07 15:07:39 -0700 | [diff] [blame] | 21 | cpu->running = true; |
swissChili | e7ee6da | 2020-08-08 16:14:21 -0700 | [diff] [blame] | 22 | memset(cpu->mem + 0x100, 0, 0xFE); |
swissChili | dbbd540 | 2020-08-07 15:07:39 -0700 | [diff] [blame] | 23 | } |
| 24 | |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 25 | cpu_t new_cpu() |
| 26 | { |
| 27 | cpu_t cpu = { 0 }; |
swissChili | b04a402 | 2020-08-09 12:51:00 -0700 | [diff] [blame] | 28 | cpu.regs[SP] = 0xFF; // stack at is 0x100 + SP |
swissChili | bb478f1 | 2020-08-07 20:45:07 -0700 | [diff] [blame] | 29 | cpu.pc = 0x600; // arbitrary program counter start |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 30 | cpu.running = true; |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 31 | cpu.mem = malloc(0xFFFF); |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 32 | cpu.screen_dirty = true; |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 33 | memset(cpu.mem, 0, 0xFFFF); |
| 34 | |
swissChili | b71e027 | 2020-08-08 15:56:14 -0700 | [diff] [blame] | 35 | ASSERT("Allocate memory for CPU", cpu.mem); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 36 | |
| 37 | return cpu; |
| 38 | } |
| 39 | |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 40 | uint16_t le_to_native(uint8_t a, uint8_t b) |
| 41 | { |
| 42 | #ifdef LITTLE_ENDIAN |
swissChili | 6a92301 | 2020-08-18 17:47:27 -0700 | [diff] [blame] | 43 | //printf("Little Endian\n"); |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 44 | return b << 8 | a; |
| 45 | #else |
swissChili | 6a92301 | 2020-08-18 17:47:27 -0700 | [diff] [blame] | 46 | //printf("Big Endian\n"); |
| 47 | return a << 8 | b; |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 48 | #endif |
| 49 | } |
| 50 | |
| 51 | void native_to_le(uint16_t n, uint8_t *a, uint8_t *b) |
| 52 | { |
| 53 | #ifdef LITTLE_ENDIAN |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 54 | *b = n >> 8; |
swissChili | 6a92301 | 2020-08-18 17:47:27 -0700 | [diff] [blame] | 55 | *a = n & 0xFF; |
| 56 | #else |
| 57 | *b = n & 0xFF; |
| 58 | *a = n >> 8; |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 59 | #endif |
| 60 | } |
| 61 | |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 62 | void stack_push(cpu_t *cpu, uint8_t v) |
| 63 | { |
| 64 | cpu->mem[cpu->regs[SP]-- + 0x100] = v; |
| 65 | } |
| 66 | |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 67 | void stack_pushle(cpu_t *cpu, uint16_t v) |
| 68 | { |
| 69 | uint8_t a, b; |
| 70 | native_to_le(v, &a, &b); |
| 71 | // push in "reverse" order so that the address is stored as LE |
| 72 | stack_push(cpu, b); |
| 73 | stack_push(cpu, a); |
| 74 | } |
| 75 | |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 76 | uint8_t stack_pop(cpu_t *cpu) |
| 77 | { |
| 78 | return cpu->mem[cpu->regs[SP]++ + 0x100]; |
| 79 | } |
| 80 | |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 81 | uint16_t stack_pople(cpu_t *cpu) |
| 82 | { |
| 83 | uint8_t a = stack_pop(cpu); |
| 84 | uint8_t b = stack_pop(cpu); |
swissChili | 6a92301 | 2020-08-18 17:47:27 -0700 | [diff] [blame] | 85 | return le_to_native(b, a); |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 86 | } |
| 87 | |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 88 | void free_cpu(cpu_t *cpu) |
| 89 | { |
| 90 | free(cpu->mem); |
| 91 | } |
| 92 | |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 93 | // rotate right |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 94 | uint8_t ror(uint8_t a, uint8_t n) |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 95 | { |
| 96 | return (a >> n) | (a << (8 - n)); |
| 97 | } |
| 98 | |
| 99 | // rotate left |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 100 | uint8_t rol(uint8_t a, uint8_t n) |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 101 | { |
| 102 | return (a << n) | (a >> (8 - n)); |
| 103 | } |
| 104 | |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 105 | void stat_nz(cpu_t *cpu, int8_t v) |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 106 | { |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 107 | cpu->status.negative = v < 0; |
| 108 | cpu->status.zero = v == 0; |
| 109 | } |
| 110 | |
| 111 | // Used to check for overflow, is c unique? |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 112 | bool last_unique(bool a, bool b, bool c) |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 113 | { |
| 114 | return a == b && a != c; |
| 115 | } |
| 116 | |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 117 | void stat_cv(cpu_t *cpu, uint8_t a, uint8_t b, uint8_t c) |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 118 | { |
| 119 | cpu->status.overflow = last_unique(a >> 7, b >> 7, c >> 7); |
| 120 | cpu->status.carry = c < a || c < b; |
| 121 | } |
| 122 | |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 123 | void cmp(cpu_t *cpu, uint8_t reg, uint8_t mem) |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 124 | { |
| 125 | cpu->status.negative = 0; |
| 126 | cpu->status.zero = 0; |
| 127 | cpu->status.carry = 0; |
| 128 | if (cpu->regs[reg] < mem) |
| 129 | { |
| 130 | cpu->status.negative = 1; |
| 131 | } |
| 132 | else if (cpu->regs[reg] == mem) |
| 133 | { |
| 134 | cpu->status.zero = 1; |
| 135 | cpu->status.carry = 1; |
| 136 | } |
| 137 | else |
| 138 | { |
| 139 | cpu->status.carry = 1; |
| 140 | } |
| 141 | } |
| 142 | |
| 143 | void execute(cpu_t *cpu, const char *mnemonic, uint8_t op, arg_t a, uint8_t am) |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 144 | { |
| 145 | // used to save space |
| 146 | #define REGS \ |
| 147 | R(X) R(A) R(Y) |
| 148 | |
swissChili | 710d18d | 2020-07-29 19:43:20 -0700 | [diff] [blame] | 149 | switch (op) { |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 150 | // Load and store instructions: |
| 151 | #define R(reg) \ |
| 152 | case LD##reg: \ |
| 153 | cpu->regs[reg] = a.val; \ |
| 154 | stat_nz(cpu, a.val); \ |
| 155 | break; |
| 156 | |
| 157 | REGS |
| 158 | |
| 159 | #undef R |
| 160 | |
| 161 | #define R(reg) \ |
| 162 | case ST##reg: \ |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 163 | cpu->mem[a.ptr] = cpu->regs[reg]; \ |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 164 | break; \ |
| 165 | |
| 166 | REGS |
| 167 | |
| 168 | #undef R |
| 169 | |
| 170 | // Arithmetic instructions: |
| 171 | // NOTE: binary coded decimals are NOT SUPPORTED because I don't want |
| 172 | // to implement them. |
| 173 | case ADC: |
| 174 | { |
| 175 | uint8_t sum = cpu->regs[A] + a.val + cpu->status.carry; |
| 176 | // signed overflow |
| 177 | stat_cv(cpu, cpu->regs[A], a.val + cpu->status.carry, sum); |
| 178 | stat_nz(cpu, sum); |
| 179 | cpu->regs[A] = sum; |
| 180 | break; |
| 181 | } |
| 182 | |
| 183 | case SBC: |
| 184 | { |
| 185 | uint8_t diff = cpu->regs[A] - a.val - !cpu->status.carry; |
| 186 | stat_cv(cpu, cpu->regs[A], a.val - !cpu->status.carry, diff); |
| 187 | stat_nz(cpu, diff); |
| 188 | cpu->regs[A] = diff; |
| 189 | break; |
| 190 | } |
| 191 | |
| 192 | case INC: |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 193 | cpu->mem[a.ptr]++; |
| 194 | stat_nz(cpu, cpu->mem[a.ptr]); |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 195 | break; |
| 196 | |
| 197 | case INX: |
| 198 | cpu->regs[X]++; |
| 199 | stat_nz(cpu, cpu->regs[X]); |
| 200 | break; |
| 201 | |
| 202 | case INY: |
| 203 | cpu->regs[Y]++; |
| 204 | stat_nz(cpu, cpu->regs[Y]); |
| 205 | break; |
| 206 | |
| 207 | case DEC: |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 208 | cpu->mem[a.ptr]--; |
| 209 | stat_nz(cpu, cpu->mem[a.ptr]); |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 210 | break; |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 211 | |
| 212 | case DEX: |
| 213 | cpu->regs[X]--; |
| 214 | stat_nz(cpu, cpu->regs[X]); |
| 215 | break; |
| 216 | |
| 217 | case DEY: |
| 218 | cpu->regs[Y]--; |
| 219 | stat_nz(cpu, cpu->regs[Y]); |
| 220 | break; |
| 221 | |
| 222 | case ASL: |
| 223 | // This check must be done here unfortunately, it would be nice |
| 224 | // to do this while decoding operands but it would require |
| 225 | // a substantial change to the architecture of the emulator |
| 226 | if (am == AM_ACC) |
| 227 | { |
| 228 | cpu->status.carry = cpu->regs[A] >> 7; |
| 229 | cpu->regs[A] <<= 1; |
| 230 | stat_nz(cpu, cpu->regs[A]); |
| 231 | } |
| 232 | else |
| 233 | { |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 234 | cpu->status.carry = cpu->mem[a.val] >> 7; |
| 235 | cpu->mem[a.ptr] <<= 1; |
| 236 | stat_nz(cpu, cpu->mem[a.ptr]); |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 237 | } |
| 238 | break; |
| 239 | |
| 240 | case LSR: |
| 241 | if (am == AM_ACC) |
| 242 | { |
| 243 | cpu->status.carry = cpu->regs[A] & 1; |
| 244 | cpu->regs[A] >>= 1; |
| 245 | stat_nz(cpu, cpu->regs[A]); |
| 246 | } |
| 247 | else |
| 248 | { |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 249 | cpu->status.carry = cpu->mem[a.val] & 7; |
| 250 | cpu->mem[a.ptr] >>= 1; |
| 251 | stat_nz(cpu, cpu->mem[a.ptr]); |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 252 | } |
| 253 | break; |
| 254 | |
| 255 | case ROL: |
| 256 | if (am == AM_ACC) |
| 257 | { |
| 258 | cpu->status.carry = cpu->regs[A] >> 7; |
| 259 | cpu->regs[A] = rol(cpu->regs[A], 1); |
| 260 | stat_nz(cpu, cpu->regs[A]); |
| 261 | } |
| 262 | else |
| 263 | { |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 264 | cpu->status.carry = cpu->mem[a.val] >> 7; |
| 265 | cpu->mem[a.ptr] = rol(a.val, 1); |
| 266 | stat_nz(cpu, cpu->mem[a.ptr]); |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 267 | } |
| 268 | break; |
| 269 | |
| 270 | case ROR: |
| 271 | if (am == AM_ACC) |
| 272 | { |
| 273 | cpu->status.carry = cpu->regs[A] & 1; |
| 274 | cpu->regs[A] = ror(cpu->regs[A], 1); |
| 275 | stat_nz(cpu, cpu->regs[A]); |
| 276 | } |
| 277 | else |
| 278 | { |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 279 | cpu->status.carry = cpu->mem[a.val] & 1; |
| 280 | cpu->mem[a.ptr] = ror(a.val, 1); |
| 281 | stat_nz(cpu, cpu->mem[a.ptr]); |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 282 | } |
| 283 | break; |
| 284 | |
| 285 | case AND: |
| 286 | cpu->regs[A] &= a.val; |
| 287 | stat_nz(cpu, cpu->regs[A]); |
| 288 | break; |
| 289 | |
| 290 | case ORA: |
| 291 | cpu->regs[A] |= a.val; |
| 292 | stat_nz(cpu, cpu->regs[A]); |
| 293 | break; |
| 294 | |
| 295 | case EOR: |
| 296 | cpu->regs[A] ^= a.val; |
| 297 | stat_nz(cpu, cpu->regs[A]); |
| 298 | break; |
| 299 | |
| 300 | case CMP: |
| 301 | cmp(cpu, A, a.val); |
| 302 | break; |
| 303 | |
| 304 | case CPX: |
| 305 | cmp(cpu, X, a.val); |
| 306 | break; |
| 307 | |
| 308 | case CPY: |
| 309 | cmp(cpu, Y, a.val); |
| 310 | break; |
| 311 | |
| 312 | // TODO: implement BIT here |
| 313 | |
| 314 | #define BRANCHES \ |
| 315 | B(BCC, carry == 0) \ |
| 316 | B(BCS, carry == 1) \ |
| 317 | B(BNE, zero == 0) \ |
| 318 | B(BEQ, zero == 1) \ |
| 319 | B(BPL, negative == 0) \ |
| 320 | B(BMI, negative == 1) \ |
| 321 | B(BVC, overflow == 0) \ |
| 322 | B(BVS, overflow == 1) |
| 323 | |
| 324 | #define B(i, c) \ |
| 325 | case i: \ |
| 326 | if (cpu->status . c) \ |
| 327 | cpu->pc = a.ptr;\ |
| 328 | break; |
| 329 | |
| 330 | BRANCHES |
| 331 | |
| 332 | #undef B |
| 333 | #undef BRANCHES |
| 334 | |
| 335 | #define TRANSFERS \ |
| 336 | T(A, X) \ |
| 337 | T(X, A) \ |
| 338 | T(A, Y) \ |
| 339 | T(Y, A) |
| 340 | |
| 341 | #define T(a, b) \ |
| 342 | case T ## a ## b: \ |
| 343 | cpu->regs[b] = cpu->regs[a]; \ |
| 344 | stat_nz(cpu, cpu->regs[b]); \ |
| 345 | break; |
| 346 | |
| 347 | TRANSFERS |
| 348 | |
| 349 | #undef T |
| 350 | #undef TRANSFERS |
| 351 | |
| 352 | case TSX: |
| 353 | cpu->regs[X] = cpu->regs[SP]; |
| 354 | stat_nz(cpu, cpu->regs[X]); |
| 355 | break; |
| 356 | |
| 357 | case TXS: |
| 358 | cpu->regs[SP] = cpu->regs[X]; |
| 359 | stat_nz(cpu, cpu->regs[X]); |
| 360 | break; |
| 361 | |
| 362 | case PHA: |
| 363 | stack_push(cpu, cpu->regs[A]); |
| 364 | break; |
| 365 | |
| 366 | case PLA: |
| 367 | cpu->regs[A] = stack_pop(cpu); |
| 368 | stat_nz(cpu, cpu->regs[A]); |
| 369 | break; |
| 370 | |
| 371 | case PHP: |
| 372 | stack_push(cpu, *(uint8_t *)(&cpu->status)); |
| 373 | break; |
| 374 | |
| 375 | case PLP: |
| 376 | { |
| 377 | uint8_t s = stack_pop(cpu); |
| 378 | *(uint8_t *)(&cpu->status) = s; |
| 379 | } |
| 380 | |
| 381 | case JMP: |
| 382 | cpu->pc = a.ptr; |
| 383 | break; |
| 384 | |
| 385 | case JSR: |
| 386 | stack_pushle(cpu, cpu->pc); |
swissChili | b04a402 | 2020-08-09 12:51:00 -0700 | [diff] [blame] | 387 | cpu->pc = a.ptr; |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 388 | break; |
| 389 | |
| 390 | case RTS: |
| 391 | cpu->pc = stack_pople(cpu); |
| 392 | break; |
| 393 | |
| 394 | // TODO: implement RTI |
| 395 | // TODO: implement flag instructions |
| 396 | |
| 397 | case BRK: |
| 398 | // TODO: trigger an interrupt |
| 399 | cpu->running = false; |
| 400 | break; |
| 401 | |
| 402 | case NOP: |
| 403 | break; |
| 404 | |
| 405 | default: |
swissChili | b71e027 | 2020-08-08 15:56:14 -0700 | [diff] [blame] | 406 | warn("Unsupported opcode: %x\n", op); |
| 407 | THROW("Unsupported opcode"); |
swissChili | 710d18d | 2020-07-29 19:43:20 -0700 | [diff] [blame] | 408 | } |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 409 | #undef REGS |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 410 | } |
| 411 | |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 412 | uint16_t fetch_le(cpu_t *cpu, uint16_t *pc) |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 413 | { |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 414 | uint8_t a = cpu->mem[(*pc)++]; |
| 415 | uint8_t b = cpu->mem[(*pc)++]; |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 416 | return le_to_native(a, b); |
| 417 | } |
| 418 | |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 419 | arg_t arg_imm(uint16_t a) |
swissChili | 710d18d | 2020-07-29 19:43:20 -0700 | [diff] [blame] | 420 | { |
| 421 | return (arg_t){ a, a }; |
| 422 | } |
| 423 | |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 424 | arg_t arg_ptr(cpu_t *c, uint flags, uint16_t p) |
swissChili | 710d18d | 2020-07-29 19:43:20 -0700 | [diff] [blame] | 425 | { |
| 426 | if (flags & FETCH_NO_INDIRECTION) |
| 427 | return arg_imm(p); |
| 428 | |
| 429 | return (arg_t){ c->mem[p], p }; |
| 430 | } |
| 431 | |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 432 | arg_t arg(uint16_t v, uint16_t a) |
swissChili | 710d18d | 2020-07-29 19:43:20 -0700 | [diff] [blame] | 433 | { |
| 434 | return (arg_t){ v, a }; |
| 435 | } |
| 436 | |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 437 | arg_t fetch_addr(cpu_t *cpu, uint8_t am, uint f, uint16_t *pc) |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 438 | { |
| 439 | switch (am) |
| 440 | { |
| 441 | case AM_ACC: |
| 442 | case AM_IMP: |
swissChili | 710d18d | 2020-07-29 19:43:20 -0700 | [diff] [blame] | 443 | return arg_imm(0); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 444 | |
| 445 | // In both cases return immediate 8 bit value |
| 446 | case AM_IMM: |
| 447 | case AM_ZP: |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 448 | return arg_imm(cpu->mem[(*pc)++]); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 449 | |
| 450 | case AM_ABS: |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 451 | return arg_ptr(cpu, f, fetch_le(cpu, pc)); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 452 | |
| 453 | case AM_REL: |
| 454 | { |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 455 | uint16_t pc_hi = * pc + 1; |
| 456 | return arg_ptr(cpu, f, (int8_t)cpu->mem[(*pc)++] + pc_hi); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 457 | } |
| 458 | |
| 459 | case AM_IND: |
| 460 | { |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 461 | uint16_t addr = fetch_le(cpu, pc); |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 462 | |
| 463 | if (f & FETCH_NO_INDIRECTION) |
| 464 | return arg_imm(addr); |
| 465 | |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 466 | uint8_t low = cpu->mem[addr], |
| 467 | high = cpu->mem[addr + 1]; |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 468 | |
swissChili | 710d18d | 2020-07-29 19:43:20 -0700 | [diff] [blame] | 469 | return arg_ptr(cpu, f, le_to_native(low, high)); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 470 | } |
| 471 | |
| 472 | case AM_AX: |
swissChili | 94ba1f5 | 2020-08-08 11:39:10 -0700 | [diff] [blame] | 473 | if (f & FETCH_NO_INDIRECTION) |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 474 | return arg_ptr(cpu, f, fetch_le(cpu, pc)); |
swissChili | 94ba1f5 | 2020-08-08 11:39:10 -0700 | [diff] [blame] | 475 | |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 476 | return arg_ptr(cpu, f, fetch_le(cpu, pc) + cpu->regs[X]); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 477 | |
| 478 | case AM_AY: |
swissChili | 94ba1f5 | 2020-08-08 11:39:10 -0700 | [diff] [blame] | 479 | if (f & FETCH_NO_INDIRECTION) |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 480 | return arg_ptr(cpu, f, fetch_le(cpu, pc)); |
swissChili | 94ba1f5 | 2020-08-08 11:39:10 -0700 | [diff] [blame] | 481 | |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 482 | return arg_ptr(cpu, f, fetch_le(cpu, pc) + cpu->regs[Y]); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 483 | |
| 484 | case AM_ZPX: |
swissChili | 94ba1f5 | 2020-08-08 11:39:10 -0700 | [diff] [blame] | 485 | if (f & FETCH_NO_INDIRECTION) |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 486 | return arg_ptr(cpu, f, cpu->mem[(*pc)++]); |
| 487 | return arg_ptr(cpu, f, cpu->mem[(*pc)++] + cpu->regs[X]); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 488 | |
| 489 | case AM_ZPY: |
swissChili | 94ba1f5 | 2020-08-08 11:39:10 -0700 | [diff] [blame] | 490 | if (f & FETCH_NO_INDIRECTION) |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 491 | return arg_ptr(cpu, f, cpu->mem[(*pc)++]); |
| 492 | return arg_ptr(cpu, f, cpu->mem[(*pc)++] + cpu->regs[Y]); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 493 | |
| 494 | case AM_ZIX: |
| 495 | { |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 496 | uint8_t zp = cpu->mem[(*pc)++]; |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 497 | |
| 498 | if (f & FETCH_NO_INDIRECTION) |
| 499 | return arg_imm(zp); |
| 500 | |
swissChili | 710d18d | 2020-07-29 19:43:20 -0700 | [diff] [blame] | 501 | uint16_t addr = zp + cpu->regs[X]; |
swissChili | b71e027 | 2020-08-08 15:56:14 -0700 | [diff] [blame] | 502 | uint16_t indirect = le_to_native(cpu->mem[addr], cpu->mem[addr + 1]); |
swissChili | 710d18d | 2020-07-29 19:43:20 -0700 | [diff] [blame] | 503 | return arg_ptr(cpu, f, indirect); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 504 | } |
| 505 | |
| 506 | case AM_ZIY: |
| 507 | { |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 508 | uint8_t zp = cpu->mem[(*pc)++]; |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 509 | |
| 510 | if (f & FETCH_NO_INDIRECTION) |
| 511 | return arg_imm(zp); |
| 512 | |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 513 | uint16_t base = le_to_native(cpu->mem[zp], cpu->mem[zp + 1]); |
swissChili | 710d18d | 2020-07-29 19:43:20 -0700 | [diff] [blame] | 514 | return arg_ptr(cpu, f, base + cpu->regs[Y]); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 515 | } |
| 516 | |
| 517 | default: |
swissChili | b71e027 | 2020-08-08 15:56:14 -0700 | [diff] [blame] | 518 | warn("Unknown address mode %x", am); |
| 519 | THROW("Unknowng address mode"); |
swissChili | 710d18d | 2020-07-29 19:43:20 -0700 | [diff] [blame] | 520 | __builtin_unreachable(); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 521 | } |
| 522 | } |
| 523 | |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 524 | void step(cpu_t *cpu) |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 525 | { |
swissChili | cc27cfe | 2020-08-08 12:57:57 -0700 | [diff] [blame] | 526 | cpu->screen_dirty = false; |
swissChili | b71e027 | 2020-08-08 15:56:14 -0700 | [diff] [blame] | 527 | uint8_t pc = cpu->pc; |
| 528 | uint8_t op = cpu->mem[cpu->pc++]; |
| 529 | switch (op) |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 530 | { |
swissChili | 97b5d8b | 2020-08-15 20:00:54 -0700 | [diff] [blame] | 531 | #define INST(mn, am, op, len) \ |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 532 | case op: \ |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 533 | execute(cpu, #mn, mn, fetch_addr(cpu, am, 0, &cpu->pc), am); \ |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 534 | break; |
| 535 | |
| 536 | INSTRUCTIONS |
| 537 | |
| 538 | #undef INST |
| 539 | |
| 540 | default: |
swissChili | b71e027 | 2020-08-08 15:56:14 -0700 | [diff] [blame] | 541 | warn("Undefined opcode %x near %x [%x]", op, pc, cpu->mem[pc]); |
| 542 | THROW("Undefined opcode"); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 543 | } |
| 544 | } |
| 545 | |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 546 | int dump_inst(cpu_t *cpu, char *buf, const char *mn, uint16_t addr, uint8_t am) |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 547 | { |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 548 | char *end = buf; |
| 549 | end += sprintf(end, "%s ", mn); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 550 | |
| 551 | switch (am) |
| 552 | { |
| 553 | case AM_IMM: |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 554 | end += sprintf(end, "#"); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 555 | case AM_REL: |
| 556 | case AM_ABS: |
| 557 | case AM_ZP: |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 558 | end += sprintf(end, "$%x", addr); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 559 | break; |
| 560 | |
| 561 | case AM_IND: |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 562 | end += sprintf(end, "($%x)", addr); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 563 | break; |
| 564 | |
| 565 | case AM_AX: |
| 566 | case AM_ZPX: |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 567 | end += sprintf(end, "$%x, X", addr); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 568 | break; |
| 569 | |
| 570 | case AM_AY: |
| 571 | case AM_ZPY: |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 572 | end += sprintf(end, "$%x, Y", addr); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 573 | break; |
| 574 | |
| 575 | case AM_ZIX: |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 576 | end += sprintf(end, "($%x, X)", addr); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 577 | break; |
| 578 | |
| 579 | case AM_ZIY: |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 580 | end += sprintf(end, "($%x), Y", addr); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 581 | break; |
| 582 | } |
| 583 | |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 584 | return end - buf; |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 585 | } |
| 586 | |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 587 | char *disas_step(cpu_t *cpu, uint16_t *pc) |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 588 | { |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 589 | char *buffer = malloc(80); |
| 590 | char *end = buffer; |
| 591 | |
| 592 | // end += sprintf(buffer, "$%x", cpu->pc); |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 593 | uint8_t op = cpu->mem[(*pc)++]; |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 594 | switch (op) |
| 595 | { |
swissChili | 97b5d8b | 2020-08-15 20:00:54 -0700 | [diff] [blame] | 596 | #define INST(mn, am, op, len) \ |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 597 | case op: \ |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 598 | end += dump_inst(cpu, end, #mn, \ |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 599 | fetch_addr(cpu, am, FETCH_NO_INDIRECTION, pc).ptr, am); \ |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 600 | break; |
| 601 | |
| 602 | INSTRUCTIONS |
| 603 | |
| 604 | #undef INST |
| 605 | |
| 606 | default: |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 607 | end += sprintf(end, "Undefined opcode %x", op); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 608 | } |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 609 | |
| 610 | *end = 0; |
| 611 | |
| 612 | return buffer; |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 613 | } |
| 614 | |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 615 | void disas_num(cpu_t *cpu, uint16_t num) |
| 616 | { |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 617 | uint16_t pc = 0x600; |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 618 | for (int i = 0; i < num; i++) |
| 619 | { |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 620 | uint16_t last_pc = pc; |
| 621 | char *line = disas_step(cpu, &pc); |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 622 | printf("$%x\t%s\n", last_pc, line); |
| 623 | free(line); |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 624 | } |
| 625 | } |
| 626 | |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 627 | void disas(cpu_t *cpu) |
| 628 | { |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 629 | uint16_t pc = 0x600; |
swissChili | 6264a3b | 2020-07-30 19:02:07 -0700 | [diff] [blame] | 630 | // Raw binary, no way to know what's code what isn't |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 631 | while (cpu->pc < 0xFFFF) |
| 632 | { |
swissChili | 1970cb8 | 2020-08-10 13:22:39 -0700 | [diff] [blame] | 633 | uint16_t last_pc = pc; |
| 634 | char *line = disas_step(cpu, &pc); |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 635 | printf("$%x\t%s\n", last_pc, line); |
| 636 | free(line); |
swissChili | 6c61a79 | 2020-07-28 16:29:20 -0700 | [diff] [blame] | 637 | } |
| 638 | } |
swissChili | c51e922 | 2020-08-07 16:09:14 -0700 | [diff] [blame] | 639 | |
swissChili | da4803e | 2020-08-06 20:06:04 -0700 | [diff] [blame] | 640 | void run(cpu_t *cpu) |
| 641 | { |
| 642 | while (cpu->running) |
| 643 | { |
| 644 | step(cpu); |
| 645 | } |
| 646 | |
| 647 | printf("CPU Halted\n"); |
| 648 | } |
swissChili | c6b4f7e | 2020-08-09 16:36:36 -0700 | [diff] [blame] | 649 | |
| 650 | void run_mq(cpu_t *cpu, mqd_t mq) |
| 651 | { |
| 652 | char buf[MQ_BUF_LEN]; |
| 653 | bool running; |
| 654 | |
| 655 | while (true) |
| 656 | { |
| 657 | if (running) |
| 658 | { |
| 659 | if (cpu->running) |
| 660 | step(cpu); |
| 661 | else |
| 662 | running = false; |
| 663 | } |
| 664 | |
| 665 | ssize_t recvd = mq_receive(mq, buf, MQ_BUF_LEN * 2, NULL); |
| 666 | |
| 667 | if (recvd == -1 && errno != EAGAIN) |
| 668 | { |
| 669 | printf("errno = %d\n", errno); |
| 670 | THROW("mq_receive returned -1"); |
| 671 | } |
| 672 | |
| 673 | if (recvd > 0) |
| 674 | { |
| 675 | if (debug_stmt(cpu, buf, &running)) |
| 676 | break; |
| 677 | } |
| 678 | } |
| 679 | } |